Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › SRAM cell with thin film transistor using two polysilicon layers

SRAM cell with thin film transistor using two polysilicon layers

US Patent 6107642 · Granted Aug 22, 2000

Estimated economic value: $24,503,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Sram cell fabrication with interlevel Dielectric planarization2010
Method and interlevel dielectric structure for improved metal step coverage2004
Method of fabricating a one-sided polysilicon thin film transistor2004
Method to form shallow junction transistors while eliminating shorts due to junc2003
Shallow junction transistors which eliminating shorts due to junction spiking2003
Method to form shallow junction transistors while eliminating shorts due to junc2001
Method of making a field effect transistor having a channel in an epitaxial sili2001
Thin film transistor with titanium nitride or refractory metal gate in SRAM devi1999
Self-aligned JFET1999
CMOS with parasitic bipolar transistor1998
Method of manufacture of thin film transistor SRAM device with a titanium nitrid1998
SRAM cell fabrication with interlevel dielectric planarization1998