Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Self-clocked logic circuit and methodology

Self-clocked logic circuit and methodology

US Patent 6064232 · Granted May 16, 2000

Estimated economic value: $14,024,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Monitoring of memory page transitions between a hypervisor and a virtual machine2020
Variable 16 or 32 bit PCI interface which supports steering and swapping of data2002
Analog delay line implemented with a digital delay line technique2001
System and method for using a memory management unit to reduce memory requiremen2000
Programmable delay line2000
Floating point timer1999