Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Modified recessed locos isolation process for deep sub-micron device processes

Modified recessed locos isolation process for deep sub-micron device processes

US Patent 5998280 · Granted Dec 7, 1999

Estimated economic value: $28,074,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Wafer bonded piezoresistive and piezoelectric force sensor and related methods o2024
Integrated systems with force or strain sensing and haptic feedback2024
Wafer bonded piezoresistive and piezoelectric force sensor and related methods o2023
Wafer bonded piezoresistive and piezoelectric force sensor and related methods o2022
Vertical semiconductor device having frontside interconnections2017
EEPROM memory cell with a coupler region and method of making the same2016
Methods of forming coaxial feedthroughs for 3D integrated circuits2015
Dynamic trim method for non volatile memory products2015
N-channel multi-time programmable memory devices2015
Low-noise, high-gain semiconductor device incorporating BCD (Bipolar-CMOS-DMOS) 2015
Methods of forming coaxial feedthroughs for 3D integrated circuits2015
Inductors and methods for integrated circuits2014