Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Byte-writable two-dimensional FIFO buffer having storage locations with fields indicating storage location availability and data ordering

Byte-writable two-dimensional FIFO buffer having storage locations with fields indicating storage location availability and data ordering

US Patent 5974516 · Granted Oct 26, 1999

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Apparatus and method for built-in test and repair of 3D-IC memory2017
Secure debug interface and memory of a media security circuit and method2012
Method and apparatus for providing a modular system on-chip interface2004
Virtual component on-chip interface2002
Methods and apparatus for processing video data2001
Shared bus system with transaction and destination ID2001
Simultaneous data transfer through read and write buffers of a DMA controller1999
Priority request and bypass bus1999
DMA controller which receives size data for each DMA channel1999
DMA controller with channel tagging1999
Bit stream signal feature detection in a signal processing system1999
Structure and method for memory initialization and power on1999