Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Two-pin distributed ethernet bus architecture

Two-pin distributed ethernet bus architecture

US Patent 5963719 · Granted Oct 5, 1999

Estimated economic value: $26,562,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Stackable switch port collapse mechanism2008
Distributed multi-link trunking method and apparatus2002
Stackable switch port collapse mechanism2002
Method and apparatus providing network communications between devices using fram2001
Method and apparatus for adjusting an interpacket gap using a network device in 2001
Two-pin distributed ethernet bus architecture2000
Two-pin distributed ethernet bus architecture2000
Two-pin distributed ethernet bus architecture2000
Memory reference tagging1997
Multi instruction register mapper1996
System for translation of virtual to physical addresses by operating memory mana1994
Simultaneously or sequentially decoding multiple specifiers of a variable length1992