Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Serial interface with register selection which uses clock counting, chip select pulsing, and no address bits

Serial interface with register selection which uses clock counting, chip select pulsing, and no address bits

US Patent 5941974 · Granted Aug 24, 1999

Estimated economic value: $23,662,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Quaternary decoder2017
Cascadable peripheral data interface including a shift register, counter, and ra1995
Serial data circuit with randomly-accessed registers of different bit length1992
Standby system for a frequency synthesizer1991
Synchronization method and circuit for display drivers1991
PLL frequency synthesizer output control circuit1990
Phase locked loop with reduced frequency/phase lock time1990