Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method and apparatus utilizing simultaneous memory reads for increasing memory access bandwidth in a digital signal processor

Method and apparatus utilizing simultaneous memory reads for increasing memory access bandwidth in a digital signal processor

US Patent 5659695 · Granted Aug 19, 1997

Estimated economic value: $16,965,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Recovering symbols in a communication receiver2011
Parallel processing for single antenna interference cancellation2011
OFDM frequency offset estimation apparatus and method2010
Method and system for execution and latching of data in alternate threads2008
Error correction in a cache memory2007
Decorrelating rake receiver apparatus and method2007
Method and apparatus for debugging a data processing system2006
Reconfigurable vector-FFT/IFFT, vector-multiplier/divider2006
Method and apparatus for debugging a data processing system2006
Four port RAM cell2004
Method and apparatus for mixing signals2001
Method and apparatus for adaptively classifying a multi-level signal2001