Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method and apparatus for routing in reduced switch matrices to provide one hundred percent coverage

Method and apparatus for routing in reduced switch matrices to provide one hundred percent coverage

US Patent 5572198 · Granted Nov 5, 1996

Estimated economic value: $57,895,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Programmable interpretive virtual machine2008
Method and apparatus for managing access to a computer system memory shared by a2001
Programmable interpretive virtual machine2000
Method and apparatus for dynamic memory management by association of free memory1999
Method and apparatus for managing access to a computer system memory shared by a1998
Method and apparatus for integrating three dimensional sound into a computer sys1998
Method and apparatus for dynamic memory management by association of free memory1998
Deterministic method and an apparatus for minimal switch circuits1996
Apparatus for configuring a subset of an integrated circuit having boundary scan1996
Process oriented logic simulation having stability checking1996
Apparatus for configuring a subset of an integrated circuit having boundary scan1995
Deterministic routing method for minimal switch circuits1994