Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method and apparatus for a dynamic, multi-speed bus architecture in which an exchange of speed messages occurs independent of the data signal transfers

Method and apparatus for a dynamic, multi-speed bus architecture in which an exchange of speed messages occurs independent of the data signal transfers

US Patent 5559967 · Granted Sep 24, 1996

Estimated economic value: $8,002,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Apparatus and methods for fractional-N phase-locked loops with multi-phase oscil2017
Apparatus and methods for phase-locked loops2014
Simultaneously-sampling single-ended and differential two-input analog-to-digita2013
Current steering circuit with feedback2012
Calibrated quadrature very low intermediate frequency receiver2010
Analog signal sampling system and method having reduced average input current2008
Range compression in oversampling analog-to-digital converters using differentia2008
Range compression in oversampling analog-to-digital converters2008
Analog-to-digital converter with reduced average input current and reduced avera2007
Analog signal sampling system and method having reduced average differential inp2006
Analog signal sampling system and method having reduced average input current2006
Buffered oversampling analog-to-digital converter with improved DC offset perfor2005