Issued Patents All Time
Showing 25 most recent of 41 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8576104 | Simultaneously-sampling single-ended and differential two-input analog-to-digital converter | Jesper Steensgaard-Madsen, Micah Galletta O'Halloran | 2013-11-05 |
| 8330633 | Current steering circuit with feedback | James L. Brubaker | 2012-12-11 |
| 7420491 | Analog signal sampling system and method having reduced average input current | — | 2008-09-02 |
| 7397403 | Range compression in oversampling analog-to-digital converters using differential input signals | — | 2008-07-08 |
| 7348907 | Range compression in oversampling analog-to-digital converters | — | 2008-03-25 |
| 7164378 | Analog-to-digital converter with reduced average input current and reduced average reference current | — | 2007-01-16 |
| 7091896 | Analog signal sampling system and method having reduced average differential input current | — | 2006-08-15 |
| 7088280 | Analog signal sampling system and method having reduced average input current | — | 2006-08-08 |
| 6927717 | Buffered oversampling analog-to-digital converter with improved DC offset performance | — | 2005-08-09 |
| 6603812 | Hardware implementation of a decimating finite impulse response filter | — | 2003-08-05 |
| 6411242 | Oversampling analog-to-digital converter with improved DC offset performance | William C. Rempfer | 2002-06-25 |
| 6359479 | Synchronizing data transfers between two distinct clock domains | — | 2002-03-19 |
| 6208279 | Single-cycle oversampling analog-to-digital converter | — | 2001-03-27 |
| 6169506 | Oversampling data converter with good rejection capability | William C. Rempfer | 2001-01-02 |
| 6140950 | Delta-sigma modulator with improved full-scale accuracy | — | 2000-10-31 |
| 5842027 | Method and apparatus for supplying power to devices coupled to a bus | Michael D. Teener | 1998-11-24 |
| 5802289 | Method for propagating preemptive bus initialization on an acyclic directed graph | — | 1998-09-01 |
| 5784557 | Method and apparatus for transforming an arbitrary topology collection of nodes into an acyclic directed graph | — | 1998-07-21 |
| 5778204 | High-speed dominant mode bus for differential signals | Roger Van Brunt | 1998-07-07 |
| 5752046 | Power management system for computer device interconnection bus | Michael D. Teener | 1998-05-12 |
| 5694060 | CMOS differential twisted-pair driver | Roger V. Brunt | 1997-12-02 |
| 5630173 | Methods and apparatus for bus access arbitration of nodes organized into acyclic directed graph by cyclic token passing and alternatively propagating request to root node and grant signal to the child node | — | 1997-05-13 |
| 5619541 | Delay line separator for data bus | Roger Van Brunt | 1997-04-08 |
| 5592510 | Common mode early voltage compensation subcircuit for current driver | Roger Van Brunt | 1997-01-07 |
| 5579486 | Communication node with a first bus configuration for arbitration and a second bus configuration for data transfer | Roger Van Brunt | 1996-11-26 |