Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Logical three dimensional interconnections between integrated circuit chips using a two dimensional multi-chip module

Logical three dimensional interconnections between integrated circuit chips using a two dimensional multi-chip module

US Patent 5543640 · Granted Aug 6, 1996

Estimated economic value: $4,355,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Fabrication of flow reactor modules and modules produced2025
Overlapping die stacks for NAND package architecture2025
Surface mount device bonded to an inner layer of a multi-layer substrate2025
Systems and methods of nano-particle bonding for electronics cooling2025
Substrates for semiconductor packages, including hybrid substrates for decouplin2025
Systems and methods for reducing the size of a semiconductor assembly2024
FAUs including passive alignment adhesive profiles and related methods2024
Integrated circuit wire bonded to a multi-layer substrate having an open area th2024
Optical assembly for coupling with two-dimensionally arrayed waveguides and asso2024
Overlapping die stacks for nand package architecture2024
Substrates for semiconductor packages, including hybrid substrates for decouplin2024
Optical assembly for interfacing waveguide arrays, and associated methods2024