Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Reduced stress terminal pattern for integrated circuit devices and packages

Reduced stress terminal pattern for integrated circuit devices and packages

US Patent 5491364 · Granted Feb 13, 1996

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Flip-chip bumping metal layer and bump structure2025
Sensor based logistics system2025
Managing brand identity, brand security, and brand reputation across communicati2025
Waveguide with slot antennas and reflectors2025
Solderable waveguide antenna2025
Originating calling party identifier lifecycle management2025
Integrated circuit (IC) packages employing a capacitor-embedded, redistribution 2025
Systems and methods for trip management2025
Three-dimensional horn air waveguide antenna made with formed and brazed metal s2024
Systems and methods for determining leg length change during hip surgery2024
Electromagnetic interference shielding and thermal management systems and method2024
Method and system for producing an environmental awareness for alerting an opera2024