Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Simulation of sequential circuits for calculating timing characteristics to design/manufacture a logic network

Simulation of sequential circuits for calculating timing characteristics to design/manufacture a logic network

US Patent 5461575 · Granted Oct 24, 1995

Estimated economic value: $19,053,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Systems and methods for digitizing multiple channels in a receiver2013
Systems and methods for channel pairing a transmitter and a receiver2012
Wireless receiver with stacked, single chip architecture2005
Host-independent monolithic integrated circuit for RF downconversion and digital2002
Voltage level translator circuit with cascoded output transistors1995
Method for optimization of digital circuit delays1994
Firm function block for a programmable block architected heterogeneous integrate1994
Programmable block architected heterogeneous integrated circuit1992
Source terminated transmission line driver1992
Direct contact TAB method1991
Load controlled ECL transient driver1990
BI-CMOS driver circuit1986