Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › End of packet detector and resynchronizer for serial data buses

End of packet detector and resynchronizer for serial data buses

US Patent 5400340 · Granted Mar 21, 1995

Estimated economic value: $15,027,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Power managers for an integrated circuit2022
Power managers for an integrated circuit2020
Memory device with a plurality of memory banks where each memory bank is associa2020
Memory device with a dual Y-multiplexer structure for performing two simultaneou2019
Memory instruction pipeline with a pre-read stage for a write operation for redu2019
Method of processing incomplete memory operations in a memory device during a po2019
Method of flushing the contents of a dynamic redundancy register to a secure sto2019
Method of reading data from a memory device using multiple levels of dynamic red2019
Device with dynamic redundancy registers2019
Memory device using levels of dynamic redundancy registers for writing a data wo2019
Method of writing contents in memory during a power up sequence using a dynamic 2019
Power managers for an integrated circuit2019