Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Apparatus and methods for reducing numbers of read-modify-write cycles to a memory, and for improving DMA efficiency

Apparatus and methods for reducing numbers of read-modify-write cycles to a memory, and for improving DMA efficiency

US Patent 5377338 · Granted Dec 27, 1994

Estimated economic value: $3,455,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Multiple mode memory module2003
Multiple mode memory module2003
Multiple mode memory module2002
Multiple mode memory module2000
Dermatome handle1998
Apparatus and methods for reducing numbers of read-modify-write cycles to a memo1997
Apparatus and methods for reducing numbers of read-modify-write cycles to a memo1997
Apparatus and methods for reducing numbers of read-modify-write cycles to a memo1997
Apparatus and methods for reducing numbers of read-modify-write cycles to a memo1997
Clock frequency multiplying and squaring circuit and method1996
Method for combining a plurality of independently operating circuits within a si1996
Virtual address translation hardware assist circuit and method1995