Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method of integrated circuit chips design

Method of integrated circuit chips design

US Patent 5347465 · Granted Sep 13, 1994

Estimated economic value: $13,331,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Apparatus and method for recalibrating a source-synchronous pipelined self-timed2005
Method for optimizing a VLSI floor planner using a path based hyper-edge represe2004
System and method for adjusting timing parts2004
Lock/unlock indicator for PLL circuits1999
Test structure for multi-layer, thin-film modules1993
Dielectric isolation for high density semiconductor devices1990
Seed and stitch approach to embedded arrays1988
Dielectrically isolated semiconductor devices1983
High performance semiconductor package assembly1982
Integrated circuit structures with full dielectric isolation and a novel method 1981
Method for making a silicon mask1981