Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Default fuse condition for memory device after final test

Default fuse condition for memory device after final test

US Patent 5345413 · Granted Sep 6, 1994

Estimated economic value: $10,432,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Preventing unintended permanent write-protection2012
Anticollision protocol with fast read request and additional schemes for reading2006
Anticollision protocol with fast read request and additional schemes for reading2005
Method, system and apparatus for calibrating a pulse position modulation (PPM) d2004
Functional pathway configuration at a system/IC interface2003
Initializing a read pipeline of a non-volatile sequential memory device1997
Memory device with switching of data stream modes1996
Serial EEPROM device and associated method for reducing data load time using a p1996
Serial EEPROM device and associated method for reducing data load time using a p1996
Power management system for serial EEPROM device1994
Power management system for serial EEPROM device1994
Programmable high endurance block for EEPROM device1994