Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method for etching integrated-circuit layers to a fixed depth and corresponding integrated circuit

Method for etching integrated-circuit layers to a fixed depth and corresponding integrated circuit

US Patent 5330617 · Granted Jul 19, 1994

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Phase change memory2021
Phase change memory2019
Process for achieving intermetallic and/or intrametallic air isolation in an int2004
Integrated semiconductor memory device having quantum well buried in a substrate2004
Process for fabricating a MOS transistor having two gates, one of which is burie2003
Process for fabricating a substrate of the silicon-on-insulator or silicon-on-no2003
MOSFET transistor with short channel effect compensated by the gate material2003
Method of forming insulated metal interconnections in integrated circuits2002
Method of isolating active areas of a semiconductor substrate by shallow trenche1997
Method of and device for isolating active areas of a semiconducor substrate by q1997
SOI MOS transistor with a substrate-source connection1992
Manufacturing process of mesa SOI MOS transistor1991