Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Structure and method of manufacture for MOS field effect transistor having lightly doped drain and source diffusion regions

Structure and method of manufacture for MOS field effect transistor having lightly doped drain and source diffusion regions

US Patent 5306655 · Granted Apr 26, 1994

Estimated economic value: $72,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Semiconductor device and method for fabricating the same2007
Semiconductor device having triple-well structure2007
Semiconductor device and manufacturing method thereof2005
MIS transistor with gate sidewall insulating layer1998
Unsymmetrical MOS device having a gate insulator area offset from the source and1997
Semiconductor device having reduced gate overlapping capacitance1997
MOS transistor and its fabricating method1996
Semiconductor device for protecting an internal circuit from electrostatic damag1996
MOS type semiconductor device having a low concentration impurity diffusion regi1996
MOS transistor for protection against electrostatic discharge1995
Structure and method of manufacture for MOS field effect transistor having light1995
LDD FET with polysilicon sidewalls1995