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Home › Unsymmetrical MOS device having a gate insulator area offset from the source and drain areas, and ESD protection circuit including such a MOS device

Unsymmetrical MOS device having a gate insulator area offset from the source and drain areas, and ESD protection circuit including such a MOS device

US Patent 5675168 · Granted Oct 7, 1997

Estimated economic value: $75,000 ⓘ

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