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Home › Method and apparatus providing for conditional execution speed-up in a computer system through substitution of a null instruction for a synchronization instruction under predetermined conditions

Method and apparatus providing for conditional execution speed-up in a computer system through substitution of a null instruction for a synchronization instruction under predetermined conditions

US Patent 5226127 · Granted Jul 6, 1993

Estimated economic value: $96,145,000 ⓘ

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