Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › System and method for reducing ground bounce in integrated circuit output buffers

System and method for reducing ground bounce in integrated circuit output buffers

US Patent 5214320 · Granted May 25, 1993

Estimated economic value: $4,790,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Clock generator with programmable non-overlapping-clock-edge capability2010
Clock generator with programmable non-overlapping-clock-edge capability2008
Clock generator with programmable non-overlapping-clock-edge capability2005
Clock generator with programmable non-overlapping-clock-edge capability2003
Clock generator with programmable non-overlapping clock-edge capability2002
Clock generator with programmable non-overlapping-clock-edge-capability2001
Integrated circuit with hardware-based programmable non-overlapping-clock-edge c2000
Layout design of integrated circuit, especially datapath circuitry, using functi2000
Method for manufacturing an integrated circuit with programmable non-overlapping1999
Synchronous multiplexer for clock signals1999
Clock generator with programmable non-overlapping clock edge capability1995
On-chip bias generator1988