Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Byte-wide dynamic RAM with multiplexed internal buses

Byte-wide dynamic RAM with multiplexed internal buses

US Patent 4449207 · Granted May 15, 1984

Estimated economic value: $17,585,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Device and method for controlling a physical system2025
Device and method for activating a conveyor device2024
Memory circuit having concurrent writes and method therefor2020
Resistive non-volatile memory and a method for sensing a memory cell in a resist2019
Optical die test interface with separate voltages for adjacent electrodes2019
Resistive non-volatile memory and a method for sensing a memory cell in a resist2019
Defective die replacement in a die stack2019
Memory repair system and method therefor2018
Die stack address bus having a programmable width2018
Memory circuit having increased write margin and method therefor2018
Partitioned memory having pipeline writes2018
Memory circuit and method for increased write margin2018