Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Asymmetrical clock separation and stage delay optimization in single flux quantum logic

Asymmetrical clock separation and stage delay optimization in single flux quantum logic

US Patent 12294369 · Granted May 6, 2025

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Ir drop compensation2025
Duty compensation scheme2025
Low loss travelling wave parametric devices using planar capacitors2025
Scaled quantum circuits2025
Synapse memory2025
Bias scheme for single-device synaptic element2024
Smooth metal layers in Josephson junction devices2024
Performance and area efficient synapse memory cell structure2023
Data transfer with continuous weighted PPM duration signal2023
Bias scheme for single-device synaptic element2023
Synapse memory2023
Synapse weight update compensation2022