Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Merged bit lines for high density memory array

Merged bit lines for high density memory array

US Patent 12243599 · Granted Mar 4, 2025

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Method for fabricating an integrated circuit comprising devices on opposing side2025
Memory devices with dual-side access circuits and methods for operating the same2025
Ferroelectric field-effect transistor (FeFET) memory2025
Second word line combined with y-mux signal in high voltage memory program2025
Push-pull low-dropout (LDO) voltage regulator2025
Radical-activated etching of metal oxides2025
MRAM cell and MRAM2025
Non-volatile static random access memory (NVSRAM) with multiple magnetic tunnel 2025
Memory device and operating method of the same2025
Memory devices, semiconductor devices, and methods of operations a memory device2025
Nonvolatile SRAM2025
Semiconductor memory devices with diode-connected MOS2025