Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Power semiconductor device having vertically parallel p-n layers formed in an active region under transistor cells and under a non-depletable extension zone formed in the edge region

Power semiconductor device having vertically parallel p-n layers formed in an active region under transistor cells and under a non-depletable extension zone formed in the edge region

US Patent 12119376 · Granted Oct 15, 2024

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Semiconductor device with sense element2025
Semiconductor device with sense element2025
Superjunction transistor device2025
Semiconductor diode and manufacturing method2025
Transistor device2025
Semiconductor device with diode chain connected to gate metallization2025
Transistor arrangement with a lateral superjunction transistor device2025
Electronic circuit with a transistor device and a biasing circuit2024
Silicon carbide device with transistor cell and clamp regions in a well region2024
Half-bridge circuit including integrated level shifter transistor2024
Half-bridge circuit including integrated level shifter transistor2024
Silicon carbide device with transistor cell and clamp region2024