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Home › Memory bit cell circuit including a bit line coupled to a static random-access memory (SRAM) bit cell circuit and a non-volatile memory (NVM) bit cell circuit and a memory bit cell array circuit

Memory bit cell circuit including a bit line coupled to a static random-access memory (SRAM) bit cell circuit and a non-volatile memory (NVM) bit cell circuit and a memory bit cell array circuit

US Patent 11749327 · Granted Sep 5, 2023

Estimated economic value: $8,300,000 ⓘ

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