Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Matrix processor generating SAR-searched input delay adjustments to calibrate timing skews in a multi-channel interleaved analog-to-digital converter (ADC)

Matrix processor generating SAR-searched input delay adjustments to calibrate timing skews in a multi-channel interleaved analog-to-digital converter (ADC)

US Patent 11641210 · Granted May 2, 2023

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Planar germanium photodetector2025
Balanced photodetector and methods thereof2025
Germanium waveguide photodetector with integrated heater2025
Analog-to-digital converter (ADC) with reference ADC path receiving attenuated i2025
Embedded three-dimensional electrode capacitor2024
Discrete-time offset correction circuit embedded in a residue amplifier in a pip2023
Cascode Class-A differential reference buffer using source followers for a multi2023
Gain-boosted class-AB differential residue amplifier in a pipelined Analog-to-Di2023
Multi-channel interleaved analog-to-digital converter (ADC) using overlapping mu2023
Calibration of timing skews in a multi-channel interleaved analog- to-digital co2023
Calibration of timing skews in a multi-channel interleaved analog- to-digital co2023
Calibration of residual errors using least-mean-squares (LMS) and stochastic-gra2021