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Home › Method of optimizing device power and efficiency based on host-controlled hints prior to low-power entry for blocks and components on a PCI express device

Method of optimizing device power and efficiency based on host-controlled hints prior to low-power entry for blocks and components on a PCI express device

US Patent 11625084 · Granted Apr 11, 2023

Estimated economic value: $27,486,000 ⓘ

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