Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Apparatus and a method for synchronizing output clock signals across a plurality of phase-locked loops

Apparatus and a method for synchronizing output clock signals across a plurality of phase-locked loops

US Patent 11509312 · Granted Nov 22, 2022

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Offset calibration method and apparatus for high bandwidth memory 3 (HBM3)2025
System and a method for aligning a programmable clock or strobe2025
System and a method for aligning a programmable clock or strobe2025
System and a method for network-on-chip power management2025
System and a method for network-on-chip power management2025
Fabric die to fabric die interconnect for modularized integrated circuit devices2025
Network-on-chip system for optimizing data transfer2025
Memory controller for improving data integrity and providing data security and a2025
Memory controller for improving data integrity and providing data security and a2025
Method and a system for network-on-chip arbitration2025
Method and a system for network-on-chip arbitration2025
Micro-network-on-chip and microsector infrastructure2024