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Home › Three-dimensional (3D), vertically-integrated field-effect transistors (FETs) electrically coupled by integrated vertical FET-to-FET interconnects for complementary metal-oxide semiconductor (CMOS) cell circuits

Three-dimensional (3D), vertically-integrated field-effect transistors (FETs) electrically coupled by integrated vertical FET-to-FET interconnects for complementary metal-oxide semiconductor (CMOS) cell circuits

US Patent 11296083 · Granted Apr 5, 2022

Estimated economic value: $22,074,000 ⓘ

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