Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Hardware simulation systems and methods for reducing signal dumping time and size by fast dynamical partial aliasing of signals having similar waveform

Hardware simulation systems and methods for reducing signal dumping time and size by fast dynamical partial aliasing of signals having similar waveform

US Patent 11275877 · Granted Mar 15, 2022

Estimated economic value: $259,273,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Techniques for testing semiconductor devices2024
Connecting random variables to coverage targets using an ensemble of static anal2024
Systems and methods for providing and using proof of coverage in a decentralized2024
Techniques for isolating interfaces while testing semiconductor devices2024
Performing hardware description language transformations2023
Performing hardware description language transformations2023
Systems and methods for providing and using proof of coverage in a decentralized2022
Automated coverage convergence by correlating random variables with coverage var2020
Systems and methods for navigating nodes in channel based chatbots using natural2020
Graphical view and debug for coverage-point negative hint2020
Graphical view and debug for coverage-point negative hint2020
Signal reconstruction in sequential logic circuitry2019