Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Sub-matrix reduction for quasi-cyclic LDPC codes

Sub-matrix reduction for quasi-cyclic LDPC codes

US Patent 11075650 · Granted Jul 27, 2021

Estimated economic value: $80,530,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Data processing engine arrangement in a device2024
Shared multi-port memory from single port2023
Data processing engine arrangement in a device2023
Shared multi-port memory from single port2022
Method for replacing a wind turbine pad2022
User-programmable LDPC decoder2021
System and method for determining bit types for polar encoding and decoding2021
Data selection network for a data processing engine in an integrated circuit2021
Method of designing and optimizing fixed cutter drill bits using dynamic cutter 2021
Cascade streaming between data processing engines in an array2021
Streaming interconnect architecture for data processing engine array2021
Data processing engine arrangement in a device2020