Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Microarchitectural techniques to mitigate cache-based data security vulnerabilities

Microarchitectural techniques to mitigate cache-based data security vulnerabilities

US Patent 11068612 · Granted Jul 20, 2021

Estimated economic value: $5,541,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Using an ensemble of data transformers to encode data before zero-value compress2025
Managing power for serverless computing2025
Controlling speculative actions based on a hit/miss predictor2025
Detecting and mitigating false structure sharing within a cache line2025
Instruction execution scheduling using a hit/miss predictor2025
Location-aware protection system of latches (LAPS-L)2025
Charge pump having switch circuits for blocking leakage current during sudden po2025
Method for generating burst error correction code, device for generating burst e2025
Semiconductor chip for correcting aligned error, semiconductor system for correc2025
Safe execution of programs that make out-of-bounds references2025
Executing a composite scalar-vector VLIW instruction having a repeat field2024
Accelerator trustworthiness2024