Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Assembly for 3D circuit with superposed transistor levels

Assembly for 3D circuit with superposed transistor levels

US Patent 11024544 · Granted Jun 1, 2021

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Functionalized object with integrated mechanical wave sensor and associated prod2025
Method for sealing cavities using membranes2025
Device for locking and/or unlocking a motor vehicle opening panel, vehicle compr2024
Composite structure, intended for a planar co-integration of electronic componen2024
Image sensor formed in sequential 3D technology2024
Device comprising wrap-gate transistors and method of manufacturing such a devic2024
Method of fabricating a semiconductor substrate having a stressed semiconductor 2023
Resistive 3D memory2023
Method for manufacturing a microelectronic device2023
Method for the production of a bulk acoustic wave resonator with a reduced paras2023
3D memory and manufacturing process2022
Touch surface device2022