Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Self-clocking sampler with reduced metastability

Self-clocking sampler with reduced metastability

US Patent 10644686 · Granted May 5, 2020

Estimated economic value: $388,005,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

High-speed signaling systems with adaptable pre-emphasis and equalization2025
Configurable, power supply voltage referenced single-ended signaling with ESD pr2025
Memory controller operable in data loop-back mode2025
Simultaneous bi-directional hybrid transceiver for single-ended voltage mode sig2025
Maintenance operations in a DRAM2025
Signaling over RC-dominated transmission lines2025
Signaling over RC-dominated transmission lines2025
Forwarding signal supply voltage in data transmission system2025
Frequency-locked and phase-locked loop-based clock glitch detection for security2025
Physically unclonable cell using dual-interlocking and error correction techniqu2024
Shower bar system2024
Level-conversion circuits for signaling across voltage domains2024