Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Memory interface circuitry with distributed data reordering capabilities

Memory interface circuitry with distributed data reordering capabilities

US Patent 10552052 · Granted Feb 4, 2020

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Offset calibration method and apparatus for high bandwidth memory 3 (HBM3)2025
System and a method for aligning a programmable clock or strobe2025
System and a method for network-on-chip power management2025
Fabric die to fabric die interconnect for modularized integrated circuit devices2025
Network-on-chip system for optimizing data transfer2025
Memory controller for improving data integrity and providing data security and a2025
Method and a system for network-on-chip arbitration2025
Micro-network-on-chip and microsector infrastructure2024
Modular periphery tile for integrated circuit device2024
System and method for transferring configuration, management, debug information 2024
Method and apparatus of receive enable margining in memory interface2024
Techniques for clock signal transmission in integrated circuits and interposers2024