Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Apparatus and method for controllably injecting jitter into recovered clock to simulate presence of jitter in input signal

Apparatus and method for controllably injecting jitter into recovered clock to simulate presence of jitter in input signal

US Patent 10466289 · Granted Nov 5, 2019

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

High-speed signaling systems with adaptable pre-emphasis and equalization2025
Equalizers, communication systems and operating methods thereof2025
Interface with variable data rate2025
Interface with variable data rate2025
Edge based partial response equalization2025
Edge based partial response equalization2025
High-speed signaling systems and methods with adaptable, continuous-time equaliz2025
High-speed signaling systems and methods with adaptable, continuous-time equaliz2025
Hybrid serial receiver circuit2025
Memory device comprising programmable command-and-address and/or data interfaces2024
Data transmission using delayed timing signals2024
Interface with variable data rate2024