Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Temporary pipeline marking for processor error workarounds

Temporary pipeline marking for processor error workarounds

US Patent 10310936 · Granted Jun 4, 2019

Estimated economic value: $2,774,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Hardware-based implementation of secure hash algorithms2025
Hardware-based message block padding for hash algorithms2025
Enhanced low precision binary floating-point formatting2023
Compute array of a processor with mixed-precision numerical linear algebra suppo2023
Instruction handling for accumulation of register results in a microprocessor2023
Host synchronized autonomous data chip address sequencer for a distributed buffe2023
Vector convert hexadecimal floating point to scaled decimal instruction2023
Hybrid floating point representation for deep learning acceleration2023
Address/command chip controlled data chip address sequencing for a distributed m2023
Condition code anticipator for hexadecimal floating point2022
Ultra-low precision floating-point fused multiply-accumulate unit2022
Address/command chip synchronized autonomous data chip address sequencer for a d2022