Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Isolation structure for semiconductor device having self-biasing buried layer and method therefor

Isolation structure for semiconductor device having self-biasing buried layer and method therefor

US Patent 10224323 · Granted Mar 5, 2019

Estimated economic value: $24,144,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Office chair2025
Semiconductor devices and methods of manufacturing semiconductor devices2025
SOI substrate and related methods2025
Scalable E2E network architecture and components to support low latency and high2025
High voltage diode on SOI substrate with trench-modified current path2024
High voltage diode on SOI substrate with trench-modified current path2024
High voltage diode on SOI substrate with trench-modified current path2024
Semiconductor devices and methods of manufacturing semiconductor devices2024
Semiconductor device having a resistor and structure therefor2024
SOI substrate and related methods2024
Cut-through latency and network fault diagnosis with limited error propagation2023
Semiconductor device2023