Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9059018 | Semiconductor device layout reducing imbalance in characteristics of paired transistors | — | 2015-06-16 |
| 8575703 | Semiconductor device layout reducing imbalance characteristics of paired transistors | — | 2013-11-05 |
| 8555224 | Circuit simulation method and semiconductor integrated circuit | Kyouji Yamashita, Gaku Suzuki | 2013-10-08 |
| 8271254 | Simulation model of BT instability of transistor | Akinari Kinoshita | 2012-09-18 |
| 7964899 | Semiconductor device and method for manufacturing the same for improving the performance of mis transistors | — | 2011-06-21 |
| 7792663 | Circuit simulation method | Daisaku Ikoma, Kyoji Yamashita, Yasuyuki Sahara, Katsuhiro Ootani | 2010-09-07 |