Issued Patents All Time
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date | Approx Value ⓘ |
|---|---|---|---|---|
| 7194501 | Complementary pass gate logic implementation of 64-bit arithmetic logic unit using propagate, generate, and kill | Sanjay Dubey, Yoganand Chillarige, Ban Wong, Cynthia Tran | 2007-03-20 | $14,471,000 |
| 7161402 | Programmable delay locked loop | Xiaojun Zhu | 2007-01-09 | $13,191,000 |