Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7200793 | Error checking and correcting for content addressable memories (CAMs) | Subramani Kengeri, David W. Carr, Paul Nadj | 2007-04-03 |
| 6654893 | System and method of operating a dynamic flip-flop in power down mode with shut-off circuit | — | 2003-11-25 |
| 6578168 | Method for operating a boundary scan cell design for high performance I/O cells | Ishwardutt Parulkar, Sridhar Narayanan, Gajendra Prasad Singh | 2003-06-10 |
| 6567944 | Boundary scan cell design for high performance I/O cells | Gajendra Prasad Singh, Sridhar Narayanan, Ishwardutt Parulkar | 2003-05-20 |
| 6424195 | Dynamic flop with power down mode | — | 2002-07-23 |
| 6288932 | Dynamic flop with power down mode | — | 2001-09-11 |