Issued Patents All Time
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6072207 | Process for fabricating layered superlattice materials and making electronic devices including same | Carlos A. Paz de Araujo, Takeshi Ito, Michael C. Scott, Larry D. McMillan | 2000-06-06 |
| 5825057 | Process for fabricating layered superlattice materials and making electronic devices including same | Hitoshi Watanabe, Carlos A. Paz de Araujo, Michael C. Scott, Takashi Mihara, Joseph D. Cuchiaro +1 more | 1998-10-20 |
| 5719416 | Integrated circuit with layered superlattice material compound | Hitoshi Watanabe, Carlos A. Paz de Araujo, Shuzo Hiraide, Takashi Mihara, Larry D. McMillan | 1998-02-17 |
| 5666305 | Method of driving ferroelectric gate transistor memory cell | Takashi Mihara, Hiroshi Nakano, Shuzo Hiraide | 1997-09-09 |
| 5561307 | Ferroelectric integrated circuit | Takashi Mihara, Hitoshi Watanabe, Larry D. McMillan, Carlos P. De Araujo | 1996-10-01 |
| 5559733 | Memory with ferroelectric capacitor connectable to transistor gate | Larry D. McMillan, Takashi Mihara, John Gregory, Carlos A. Paz de Araujo | 1996-09-24 |
| 5541870 | Ferroelectric memory and non-volatile memory cell for same | Takashi Mihara, Hitoshi Watanabe, Carlos A. Paz de Araujo, Larry D. McMillan | 1996-07-30 |
| 5523964 | Ferroelectric non-volatile memory unit | Larry D. McMillan, Takashi Mihara, John Gregory, Carlos A. Paz de Araujo | 1996-06-04 |
| 5508954 | Method and apparatus for reduced fatigue in ferroelectric memory | Takashi Mihara, Hitoshi Watanabe, Carlos A. Paz de Araujo, Larry D. McMillan | 1996-04-16 |
| 5487032 | Method and apparatus for reduced fatigue in ferroelectric memory elements | Takashi Mihara, Hitoshi Watanabe, Carlos A. Paz de Araujo, Larry D. McMillan | 1996-01-23 |
| 5468684 | Integrated circuit with layered superlattice material and method of fabricating same | Hitoshi Watanabe, Carlos A. Paz de Araujo, Shuzo Hiraide, Takashi Mihara, Larry D. McMillan | 1995-11-21 |
| 5466629 | Process for fabricating ferroelectric integrated circuit | Takashi Mihara, Hitoshi Watanabe, Larry D. McMillan, Carlos P. De Araujo | 1995-11-14 |
| 5439845 | Process for fabricating layered superlattice materials and making electronic devices including same | Hitoshi Watanabe, Carlos A. Paz de Araujo, Michael C. Scott, Takashi Mihara, Joseph D. Cuchiaro +1 more | 1995-08-08 |
| 5434102 | Process for fabricating layered superlattice materials and making electronic devices including same | Hitoshi Watanabe, Carlos A. Paz de Araujo, Michael C. Scott, Takashi Mihara, Joseph D. Cuchiaro +1 more | 1995-07-18 |
| 5060191 | Ferroelectric memory | Tatsuo Nagasaki, Masayoshi Omura, Hitoshi Watanabe, Shinichi Imade, Eishi Ikuta +1 more | 1991-10-22 |
| 5003423 | Vertical recording magnetic head | Tatsuo Imamura, Yoshio Fukuda, Hiroyuki Abe, Hiroyuki Watanabe, Makoto Koike | 1991-03-26 |
| 4998175 | Transducer-to-medium stabilizing device having a static pressure releasing arrangement for maintaining the transducer in a stable contact relationship with a recording medium | Tatsuo Imamura, Akira Katoh, Shinichi Harada | 1991-03-05 |