Issued Patents All Time
Showing 1–18 of 18 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6134153 | Bi-directional data bus scheme with optimized read and write characters | Valerie L. Lines, Cynthia Mar, Xiao Luo | 2000-10-17 |
| 5982674 | Bi-directional data bus scheme with optimized read and write characters | Valeria Lines, Cynthia Mar, Xiao Luo | 1999-11-09 |
| 5850362 | Semiconductor memory device employing an improved layout of sense amplifiers | Shinzo Sakuma | 1998-12-15 |
| 5818787 | Semiconductor memory device | Tamihiro Ishimura | 1998-10-06 |
| 5699316 | Semiconductor memory device | Katsuaki Matsui, Tamihiro Ishimura | 1997-12-16 |
| 5686752 | Semiconductor device having a CMOS element as a buffer | Tamihiro Ishimura | 1997-11-11 |
| 5625315 | Booster power generating circuit | Katsuaki Matsui, Hidekazu Kikuchi | 1997-04-29 |
| 5521869 | Semiconductor memory with improved transfer gate drivers | Tamihiro Ishimura | 1996-05-28 |
| 5502415 | Booster power generating circuit | Katsuaki Matsui, Hidekazu Kikuchi | 1996-03-26 |
| 5452260 | Semiconductor memory circuit | Katsuaki Matsui, Tamihiro Ishimura | 1995-09-19 |
| 5422853 | Sense amplifier control circuit for semiconductor memory | — | 1995-06-06 |
| 5394368 | Semiconductor memory device | — | 1995-02-28 |
| 5394374 | Semiconductor memory with improved transfer gate drivers | Tamihiro Ishimura | 1995-02-28 |
| 5363331 | Semiconductor memory with column line control circuits for protection against broken column lines | Katsuaki Matsui | 1994-11-08 |
| 5313426 | Semiconductor memory device | Shinzo Sakuma | 1994-05-17 |
| 5297105 | Semiconductor memory circuit | Katsuaki Matsui, Tamihiro Ishimura | 1994-03-22 |
| 5113088 | Substrate bias generating circuitry stable against source voltage changes | Takayuki Yamamoto | 1992-05-12 |
| 4843258 | Drive circuit with a ring oscillator for a semiconductor device | Masahumi Miyawaki, Tamihiro Ishimura | 1989-06-27 |