Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10680068 | Semiconductor substrate | Ko IMAOKA, Takanori Murasaki, Toshihisa Shimo, Hidetsugu Uchida | 2020-06-09 |
| 9773678 | Semiconductor substrate and method for manufacturing semiconductor substrate | Ko IMAOKA, Motoki Kobayashi, Hidetsugu Uchida, Kuniaki Yagi, Takamitsu Kawahara +4 more | 2017-09-26 |
| 9761479 | Manufacturing method for semiconductor substrate | Ko IMAOKA, Motoki Kobayashi, Hidetsugu Uchida, Kuniaki Yagi, Takamitsu Kawahara +5 more | 2017-09-12 |
| 7804127 | Semiconductor non-volatile memory having semiconductor non-volatile memory cell with electric charge accumulation layer, and method of producing the same | Koji Takaya | 2010-09-28 |
| 6757049 | Apparatus and method for exposure | — | 2004-06-29 |
| 6601314 | Method of manufacturing alignment mark | Satoshi Machida | 2003-08-05 |
| 6589385 | Resist mask for measuring the accuracy of overlaid layers | Satoshi Machida | 2003-07-08 |
| 6562188 | Resist mask for measuring the accuracy of overlaid layers | Satoshi Machida | 2003-05-13 |
| 6559063 | Method for manufacturing semiconductor wafer having resist mask with measurement marks for measuring the accuracy of overlay of a photomask | Satoshi Machida | 2003-05-06 |
| 6440262 | Resist mask having measurement marks for measuring the accuracy of overlay of a photomask disposed on semiconductor wafer | Satoshi Machida | 2002-08-27 |
| 6368980 | Resist mark having measurement marks for measuring the accuracy of overlay of a photomask disposed on semiconductor wafer and method for manufacturing semiconductor wafer having it | Satoshi Machida | 2002-04-09 |
| 6140711 | Alignment marks of semiconductor substrate and manufacturing method thereof | Satoshi Machida | 2000-10-31 |