Issued Patents All Time
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11093323 | Performant inline ECC architecture for DRAM controller | Ashutosh Pandey, Kaushal Agarwal, Justin Cyle Bennett, Srinivas Santosh Kumar MADUGULA | 2021-08-17 |
| 10754775 | Fast cache invalidation response using cache class attributes | Gosagan Padmanabhan, Devesh Mittal, Kaushal Agarwal | 2020-08-25 |
| 10114760 | Method and system for implementing multi-stage translation of virtual addresses | Steven E. Molnar, James Leroy Deming, Samuel H. Duncan, Jeffrey M. Smith | 2018-10-30 |
| 9823869 | System and method of protecting data in dynamically-allocated regions of memory | Franciscus W. Sijstermans, Steven E. Molnar, Gilberto Contreras, Jay Huang, Michael A. Wasserman +1 more | 2017-11-21 |
| 9245129 | System and method for protecting data by returning a protect signal with the data | Jay Huang, Steven E. Molnar, Parthasarathy Sriram, James Leroy Deming | 2016-01-26 |
| 9104423 | Method and system for advance wakeup from low-power sleep states | Sagheer Ahmad, Laurent Moll | 2015-08-11 |
| 7496109 | Method of maximizing bandwidth efficiency in a protocol processor | Somnath Paul | 2009-02-24 |
| 6957309 | Method and apparatus for re-accessing a FIFO location | Somnath Paul | 2005-10-18 |
| 6948030 | FIFO memory system and method | Amitabha Banerjee, Somnath Paul | 2005-09-20 |
| 6760872 | Configurable and memory architecture independent memory built-in self test | Somnath Paul | 2004-07-06 |