Issued Patents All Time
Showing 26–41 of 41 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7966466 | Memory domain based security control with data processing systems | Stuart David Biles, Richard Roy Grisenthwaite | 2011-06-21 |
| 7949835 | Data processing apparatus and method for controlling access to memory | Donald Felton, Ashley Miles Stevens, Anthony Paul Thompson | 2011-05-24 |
| 7913120 | Selective disabling of diagnostic functions within a data processing system | Michael John Williams | 2011-03-22 |
| 7895417 | Select-and-insert instruction within data processing systems | Dominic Hugo Symes, Mladen Wilder | 2011-02-22 |
| 7886098 | Memory access security management | Stuart David Biles | 2011-02-08 |
| 7814302 | Address calculation instruction within data processing systems | Dominic Hugo Symes, Mladen Wilder | 2010-10-12 |
| 7668897 | Result partitioning within SIMD data processing systems | — | 2010-02-23 |
| 7653547 | Method for testing a speech server | Daniel Herron, Anand Ramakrishna | 2010-01-26 |
| 7650479 | Maintaining cache coherency for secure and non-secure data access requests | — | 2010-01-19 |
| 7587444 | Data value addition | Micah McDaniel, Ann Sekli Chin | 2009-09-08 |
| 7529916 | Data processing apparatus and method for controlling access to registers | James Ian McNiven, Daniel Luke Kefford, David Hennah Mansell | 2009-05-05 |
| 7506091 | Interrupt controller utilising programmable priority values | Richard Roy Grisenthwaite, Stuart David Biles, David Hennah Mansell | 2009-03-17 |
| 7447726 | Polynomial and integer multiplication | Micah McDaniel | 2008-11-04 |
| 7020751 | Write back cache memory control within data processing system | — | 2006-03-28 |
| 6684302 | Bus arbitration circuit responsive to latency of access requests and the state of the memory circuit | — | 2004-01-27 |
| 6490655 | Data processing apparatus and method for cache line replacement responsive to the operational state of memory | — | 2002-12-03 |