Issued Patents All Time
Showing 26–50 of 93 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9164559 | Low power semi-reflective display | — | 2015-10-20 |
| 9130597 | Non-volatile memory error correction | — | 2015-09-08 |
| 9129042 | Nearest neighbor serial content addressable memory | — | 2015-09-08 |
| 9124256 | Tunable clock system | — | 2015-09-01 |
| 9007798 | Nearest neighbor serial content addressable memory | — | 2015-04-14 |
| 9000660 | Uses of hydrocarbon nanorings | — | 2015-04-07 |
| 8996938 | On-chip service processor | Bulent Dervisoglu, Vacit Arat | 2015-03-31 |
| 8958265 | Nearest neighbor serial content addressable memory | — | 2015-02-17 |
| 8928387 | Tunable clock distribution system | — | 2015-01-06 |
| 8907707 | Aligning multiple chip input signals using digital phase lock loops | — | 2014-12-09 |
| 8743578 | Use of hydrocarbon nanorings for data storage | — | 2014-06-03 |
| 8692596 | Aligning multiple chip input signals using digital phase lock loops | — | 2014-04-08 |
| 8656143 | Variable clocked heterogeneous serial array processor | — | 2014-02-18 |
| RE44764 | Serially decoded digital device testing | — | 2014-02-11 |
| 8593191 | Aligning multiple chip input signals using digital phase lock loops | — | 2013-11-26 |
| 8339824 | Nearest neighbor serial content addressable memory | — | 2012-12-25 |
| 8239716 | On-chip service processor | Bulent Dervisoglu, Vacit Arat | 2012-08-07 |
| 8166278 | Hashing and serial decoding techniques | — | 2012-04-24 |
| 8085567 | Iterative serial content addressable memory | — | 2011-12-27 |
| 7890899 | Variable clocked scan test improvements | Bulent Dervisoglu | 2011-02-15 |
| 7836371 | On-chip service processor | Bulent Dervisoglu, Vacit Arat | 2010-11-16 |
| 7818538 | Hashing and serial decoding techniques | — | 2010-10-19 |
| 7797595 | Serially decoded digital device testing | — | 2010-09-14 |
| 7752515 | Accelerated scan circuitry and method for reducing scan test data volume and execution time | Bulent Dervisoglu | 2010-07-06 |
| RE41187 | Variable clocked scan test circuitry and method | — | 2010-03-30 |