JD

Jose Delvalle

NE Netlist: 6 patents #10 of 30Top 35%
Overall (All Time): #851,975 of 4,157,543Top 25%
6
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
8971045 Module having at least one thermally conductive layer between printed circuit boards Robert Pauley, Jayesh R. Bhakta, William M. Gervasi, Chi-She Chen 2015-03-03
8345427 Module having at least two surfaces and at least one thermally conductive layer therebetween Robert Pauley, Jayesh R. Bhakta, William M. Gervasi, Chi-She Chen 2013-01-01
7839645 Module having at least two surfaces and at least one thermally conductive layer therebetween Robert Pauley, Jayesh R. Bhakta, William M. Gervasi, Chi-She Chen 2010-11-23
7630202 High density module having at least two substrates and at least one thermally conductive layer therebetween Robert Pauley, Jayesh R. Bhakta, William M. Gervasi, Chi-She Chen 2009-12-08
7375970 High density memory module using stacked printed circuit boards Robert Pauley, Jayesh R. Bhakta, William M. Gervasi, Chi-She Chen 2008-05-20
7254036 High density memory module using stacked printed circuit boards Robert Pauley, Jayesh R. Bhakta, William M. Gervasi, Chi-She Chen 2007-08-07